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Disambiguation of "Swaminathan, Madhavan"

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Inductance and Resistance Calculations in Three-Dimensional Packaging Using Cylindrical Conduction-Mode Basis Functions.

, and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (6): 846-859 (2009)

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Soumya Madhavan

Sushmitha Swaminathan

Madhavan Nallani

Dharanija Madhavan

Ashwin Swaminathan

 

Other publications of authors with the same name

Modeling and Analysis of Power Distribution Networks for Gigabit Applications., , , , , and . IEEE Trans. Mob. Comput., 2 (4): 299-313 (2003)System level signal and power integrity analysis methodology for system-in-package applications., , , , and . DAC, page 1009-1012. ACM, (2006)Minimizing simultaneous switching noise at reduced power with constant-voltage power transmission lines for high-speed signaling., , and . ISQED, page 714-718. IEEE, (2013)Inductance and Resistance Calculations in Three-Dimensional Packaging Using Cylindrical Conduction-Mode Basis Functions., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (6): 846-859 (2009)A Hybrid Methodology for Jitter and Eye Estimation in High-Speed Serial Channels Using Polynomial Chaos Surrogate Models., , , and . IEEE Access, (2019)Clock Delivery Network Design and Analysis for Interposer-Based 2.5-D Heterogeneous Systems., , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (4): 605-616 (2021)Chip-embedded Glass Interposer for 5G Applications., , , , , , , and . RWS, page 129-131. IEEE, (2023)Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options., , , , and . DAC, page 1189-1194. IEEE, (2021)Design Space Extrapolation for Power Delivery Networks using a Transposed Convolutional Net., and . ISQED, page 7-12. IEEE, (2021)Enhancement of Signal Integrity and Power Integrity with Embedded Capacitors in High-Speed Packages., , , , , and . ISQED, page 284-291. IEEE Computer Society, (2006)