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Disambiguation of "Chou, Tan-Li"

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Accurate power estimation of CMOS sequential circuits.

, and . IEEE Trans. Very Large Scale Integr. Syst., 4 (3): 369-380 (1996)

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Li Tan

Li Tan

Li-Fang Chou

Remi Chou

Joseph Chou

 

Other publications of authors with the same name

Accurate power estimation of CMOS sequential circuits., and . IEEE Trans. Very Large Scale Integr. Syst., 4 (3): 369-380 (1996)Estimating Circuit Activity in Combinational CMOS Digital Circuits., , and . IEEE Des. Test Comput., 17 (2): 112-119 (2000)Low-Power Driven Logic Synthesis Using Accurate Power Estimation Technique., , , and . VLSI Design, page 179-184. IEEE Computer Society, (1997)A 12nm 121-TOPS/W 41.6-TOPS/mm2 All Digital Full Precision SRAM-based Compute-in-Memory with Configurable Bit-width For AI Edge Applications., , , , , , , , and . VLSI Technology and Circuits, page 24-25. IEEE, (2022)Estimation of sequential circuit activity considering spatial and temporal correlations., and . ICCD, page 577-582. IEEE Computer Society, (1995)A 16nm 32Mb Embedded STT-MRAM with a 6ns Read-Access Time, a 1M-Cycle Write Endurance, 20-Year Retention at 150°C and MTJ-OTP Solutions for Magnetic Immunity., , , , , , , , , and 8 other author(s). ISSCC, page 494-495. IEEE, (2023)34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm2 and 3.78Mb/mm2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit Cell., , , , , , , , , and 13 other author(s). ISSCC, page 572-574. IEEE, (2024)Power Estimation Under Uncertain Delays., and . Integr. Comput. Aided Eng., 5 (2): 107-116 (1998)Statistical estimation of sequential circuit activity., and . ICCAD, page 34-37. IEEE Computer Society / ACM, (1995)Estimation of circuit activity considering signal correlations and simultaneous switching., , and . ICCAD, page 300-303. IEEE Computer Society / ACM, (1994)