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Disambiguation of "Sciuto, Donatella"

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Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems.

, , , , , and . CODES+ISSS, page 325-334. ACM, (2009)

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Donatella Cesare

Donatella Cesare

Donatella Germanese

Donatella Giovannini

Donatella Fiala

 

Other publications of authors with the same name

Task Partitioning for the Scheduling on Reconfigurable Systems driven by Specification Self-Similarity., , , and . ERSA, page 78-84. CSREA Press, (2007)Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs., , , , , and . IESS, volume 231 of IFIP Advances in Information and Communication Technology, page 179-192. Springer, (2007)A Power-Efficient Methodology for Mapping Applications on Multi-Processor, System-on-Chip Architectures., , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 177-196. Springer, (2006)Internal and External Bitstream Relocation for Partial Dynamic Reconfiguration., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (11): 1650-1654 (2009)Mine with it or sell it: the superhashing power dilemma., , , and . SIGMETRICS Perform. Evaluation Rev., 46 (3): 127-130 (2018)ASSURE: RTL Locking Against an Untrusted Foundry., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (7): 1306-1318 (2021)Using Critical Success Factors for Assessing Critical Activities in ERP Implementation within SMEs., , and . ICEIS (1), page 285-292. (2005)Two-Dimensional Sequential Array Architectures: Design for Testability Approaches., , and . ISCAS, page 81-84. IEEE, (1994)Data Path Testability Analysis Based on BDDs., , and . ISCAS, page 2012-2014. IEEE, (1995)GECO: A Tool for Automatic Generation of Error Control Codes for Computer Applications., , and . ISCAS, page 912-915. IEEE, (1995)