( en | de | ru )

 

Disambiguation of "Brooks, David M."

Author of the publication

copydeleteadd this publication to your clipboard
Process Variation Tolerant 3T1D-Based Cache Architectures.

, , , and . MICRO, page 15-26. IEEE Computer Society, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Stephen Brooks

David M Eche

David M Eche

David M Stec

David M Allen

 

Other publications of authors with the same name

Optimizing pipelines for power and performance., , , , , , and . MICRO, page 333-344. ACM/IEEE Computer Society, (2002)An event-guided approach to reducing voltage noise in processors., , , , and . DATE, page 160-165. IEEE, (2009)System design considerations for sensor network applications., , and . ISCAS, page 2566-2569. IEEE, (2008)New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors., , , , , and . IBM J. Res. Dev., 47 (5-6): 653-670 (2003)A power electronics unit to drive piezoelectric actuators for flying microrobots., , , , , and . CICC, page 1-4. IEEE, (2015)Design and test strategies for microarchitectural post-fabrication tuning., , , and . ICCD, page 84-90. IEEE Computer Society, (2009)Achieving uniform performance and maximizing throughput in the presence of heterogeneity., , , and . HPCA, page 3-14. IEEE Computer Society, (2011)Multi-accelerator system development with the ShrinkFit acceleration framework., , and . ICCD, page 75-82. IEEE Computer Society, (2014)Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance., and . HPCA, page 13-22. IEEE Computer Society, (1999)Wattch: a framework for architectural-level power analysis and optimizations., , and . ISCA, page 83-94. IEEE Computer Society, (2000)