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A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses.

, , , , and . DFT, page 1-6. IEEE, (2021)

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Is your FPGA bitstream Hardware Trojan-free? Machine learning can provide an answer., , , , , , and . J. Syst. Archit., (2022)Towards Dependable RISC-V Cores for Edge Computing Devices., , , , , , , , , and . IOLTS, page 1-7. IEEE, (2023)Built-in Software Obfuscation for Protecting Microprocessors against Hardware Trojan Horses., , and . DFT, page 1-6. IEEE, (2023)Improving the Detection of Hardware Trojan Horses in Microprocessors via Hamming Codes., , , and . DFT, page 1-6. IEEE, (2023)Is RISC-V ready for Space? A Security Perspective., , , , , , and . DFT, page 1-6. IEEE, (2022)Processor Security: Detecting Microarchitectural Attacks via Count-Min Sketches., , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 30 (7): 938-951 (2022)hXDP: Efficient software packet processing on FPGA NICs., , , , , , , , , and . Commun. ACM, 65 (8): 92-100 (2022)hXDP: Efficient Software Packet Processing on FPGA NICs., , , , , , , , , and . OSDI, page 973-990. USENIX Association, (2020)A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses., , , , and . DFT, page 1-6. IEEE, (2021)Machine Learning-Based Classification of Hardware Trojans in FPGAs Implementing RISC-V Cores., , , and . ICISSP, page 717-724. SCITEPRESS, (2024)