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An experimental analysis of the effectiveness of the circular self-test path technique.

, , and . EURO-DAC, page 246-251. IEEE Computer Society, (1994)

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The Use of Model Checking in ATPG for Sequential Circuits., , , and . CAV, volume 531 of Lecture Notes in Computer Science, page 86-95. Springer, (1990)Online and Offline BIST in IP-Core Design., , , , and . IEEE Des. Test Comput., 18 (5): 92-99 (2001)Design and Review of Water Management System Using Ethernet, Wi-Fi 802.11n, Modbus, and Other Communication Standards., , , , and . Wireless Personal Communications, 106 (4): 1677-1699 (2019)GATTO: a genetic algorithm for automatic test pattern generation for large synchronous sequential circuits., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (8): 991-1000 (1996)PART: Programmable Array Testing Based on a Partitioning Algorithm., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 3 (2): 142-149 (1984)Guest Editorial., and . J. Electron. Test., 17 (3-4): 207 (2001)SATTA: A Self-Adaptive Temperature-Based TDF Awareness Methodology for Dynamically Reconfigurable FPGAs., , , , and . ACM Trans. Reconfigurable Technol. Syst., 8 (1): 1:1-1:22 (2015)A Self-Repairing Execution Unit for Microprogrammed Processors., , and . IEEE Micro, 21 (5): 16-22 (2001)DTIS 2015 foreword., and . DTIS, page 1. IEEE, (2015)An experimental analysis of the effectiveness of the circular self-test path technique., , and . EURO-DAC, page 246-251. IEEE Computer Society, (1994)