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Bottlenecks in Multimedia Processing with SIMD Style Extensions and Architectural Enhancements., , and . IEEE Trans. Computers, 52 (8): 1015-1031 (2003)Charles R. (Chuck) Moore (1961 - 2012)., , and . IEEE Micro, 32 (4): 3-5 (2012)Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches., , and . IEEE Micro, 23 (6): 99-107 (2003)A design space evaluation of grid processor architectures., , , and . MICRO, page 40-51. ACM/IEEE Computer Society, (2001)Exploring the Design Space of Future CMPs., , and . IEEE PACT, page 199-210. IEEE Computer Society, (2001)Shared Microexponents: A Little Shifting Goes a Long Way., , , , , , , , , and 12 other author(s). CoRR, (2023)End-to-end validation of architectural power models., , and . ISLPED, page 383-388. ACM, (2009)Inside Project Brainwave's Cloud-Scale, Real-Time AI Processor., , , , , , , , , and 10 other author(s). IEEE Micro, 39 (3): 20-28 (2019)Evolving Compiler Heuristics to Manage Communication and Contention., , , , , and . AAAI, page 1690-1693. AAAI Press, (2010)What the Future Holds for Solid-State Memory., and . Computer, 47 (1): 24-31 (2014)