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Interconnect routing of embedded FPGAs using standard VLSI routing tools.

, , , and . SoC, page 121-124. IEEE, (2010)

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Interconnect routing of embedded FPGAs using standard VLSI routing tools., , , and . SoC, page 121-124. IEEE, (2010)DAiSI -- Dynamic Adaptive System Infrastructure, , , , , and . IESE-Report No. 051.07/E. Fraunhofer Institut für Experimentelles Software Engineering, (June 2007)Integrating Sensor Nodes into a Middleware for Ambient Intelligence, , and . Proceedings of the Workshop on Building Software for Sensor Networks, Portland, Oregon, USA, ACM, (October 2006)Electronic Proceedings.Aufnahme, Analyse und Visualisierung von Bewegungen nativer Herzklappen in-vitro., , , and . Bildverarbeitung für die Medizin, page 328-332. Springer, (2008)Software Architecture Best Practices for Enterprise Artificial Intelligence., , , , , , and . GI-Jahrestagung, volume P-307 of LNI, page 165-181. GI, (2020)A model to quantitatively assess the security of organizations. Erlangen-Nürnberg, (2008)A 550 Mb/s Radix-4 Bit-level Pipelined 16-State 0.25-mu m CMOS Viterbi Decoder., , , , , and . ASAP, page 195-. IEEE Computer Society, (2000)Semi Custom Design: A Case Study on SIMD Shufflers., , , , , , , and . PATMOS, volume 4644 of Lecture Notes in Computer Science, page 433-442. Springer, (2007)An Echo-Cancelling Front-End for 112Gb/s PAM-4 Simultaneous Bidirectional Signaling in 14nm CMOS., , , , , , , , , and 10 other author(s). ISSCC, page 194-196. IEEE, (2021)