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Pressure-Aware Control Layer Optimization for Flow-Based Microfluidic Biochips., , , , , , , and . IEEE Trans. Biomed. Circuits Syst., 11 (6): 1488-1499 (2017)Synthesis of Reconfigurable Flow-Based Biochips for Scalable Single-Cell Screening., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (12): 2255-2270 (2019)Post-Route Alleviation of Dense Meander Segments in High-Performance Printed Circuit Boards., , , and . CoRR, (2017)PieceTimer: A Holistic Timing Analysis Framework Considering Setup/Hold Time Interdependency Using A Piecewise Model., , and . CoRR, (2017)Post-route refinement for high-frequency PCBs considering meander segment alleviation., , , and . ACM Great Lakes Symposium on VLSI, page 323-324. ACM, (2013)Automatic generation of hierarchical placement rules for analog integrated circuits., , , and . ISPD, page 47-54. ACM, (2010)Emulation of an ASIC Power, Temperature and Aging Monitor System for FPGA Prototyping., , , and . IOLTS, page 220-225. IEEE, (2018)Multicontrol: Advanced Control-Logic Synthesis for Flow-Based Microfluidic Biochips., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (10): 2489-2502 (2020)A Multilabel Active Learning Framework for Microcontroller Performance Screening., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (10): 3436-3449 (October 2023)DCSA: Distributed Channel-Storage Architecture for Flow-Based Microfluidic Biochips., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (1): 115-128 (2021)