( en | de | ru )

 

Disambiguation of "Tsui, Chi-Ying"

Author of the publication

copydeleteadd this publication to your clipboard
An Integrated Battery-Hardware Model for Portable Electronics.

, , and . ASP-DAC, page 109-. IEEE Computer Society, (1999)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Ying Chi

Chi Lan Tsui

Matthew Tsui

Ying Ying

Tung Yu Tsui

 

Other publications of authors with the same name

Power estimation methods for sequential logic circuits., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 3 (3): 404-416 (1995)Single-inductor multiple-output switching converters with time-multiplexing control in discontinuous conduction mode., , , and . IEEE J. Solid State Circuits, 38 (1): 89-100 (2003)Adaptively-biased capacitor-less CMOS low dropout regulator with direct current feedback., , and . ASP-DAC, page 104-105. IEEE, (2006)A high-throughput and energy-efficient RRAM-based convolutional neural network using data encoding and dynamic quantization., , , and . ASP-DAC, page 123-128. IEEE, (2018)An efficient and reconfigurable VLSI architecture for different block matching motion estimation algorithms., and . ICASSP, page 603-606. IEEE Computer Society, (1997)Approximate Matrix Inversion for Linear Pre-coders in Massive MIMO., and . VLSI-SoC (Selected Papers), volume 508 of IFIP Advances in Information and Communication Technology, page 192-212. Springer, (2016)CompRRAE: RRAM-based convolutional neural network accelerator with reduced computations through a runtime activation estimation., , , and . ASP-DAC, page 133-139. ACM, (2019)SparseNN: An energy-efficient neural network accelerator exploiting input and output sparsity., , , and . DATE, page 241-244. IEEE, (2018)A flit-level speedup scheme for network-on-chips using self-reconfigurable bi-directional channels., , and . DATE, page 1295-1300. IEEE, (2012)A 6.78MHz 92.3%-Peak-Efficiency Single-Stage Wireless Charger with CC-CV Charging and On-Chip Bootstrapping Techniques., , , , , , , and . VLSI Circuits, page 320-. IEEE, (2019)