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Disambiguation of "Hosoya, Masahiro"

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A 900-MHz bandwidth analog baseband circuit with 1-dB step and 30-dB gain dynamic range.

, , and . ESSCIRC, page 466-469. IEEE, (2010)

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Masahiro Noguchi

Georg Hosoya

Masahiro Ogawa

Masahiro Yoshida

Masahiro Katsura

 

Other publications of authors with the same name

A 1.9/2.4GHz dual band CMOS power amplifier with integrated AM-PM distortion canceller., , , , , and . CICC, page 1-4. IEEE, (2011)A 3-GS/s 5-bit Flash ADC with wideband input buffer amplifier., , , and . VLSI-DAT, page 1-4. IEEE, (2013)A single-chip 8-band CMOS transceiver for W-CDMA(HSPA) / GSM(GPRS) / EDGE with digital interface., , , , , , , , , and 19 other author(s). ESSCIRC, page 142-145. IEEE, (2008)20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication., , , , , , , , , and 10 other author(s). ISSCC, page 348-349. IEEE, (2014)A 900-MHz bandwidth analog baseband circuit with 1-dB step and 30-dB gain dynamic range., , and . ESSCIRC, page 466-469. IEEE, (2010)A Wide Bandwidth Analog Baseband Circuit for 60-GHz Proximity Wireless Communication Receiver in 65-nm CMOS., , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 98-A (2): 492-499 (2015)A 10-MHz Signal Bandwidth Cartesian Loop Transmitter Capable of Off-Chip PA Linearization., , , and . IEEE J. Solid State Circuits, 45 (12): 2785-2793 (2010)A 1.9 GHz CMOS Power Amplifier With Embedded Linearizer to Compensate AM-PM Distortion., , , , , and . IEEE J. Solid State Circuits, 47 (8): 1820-1827 (2012)Correction to Ä 2 Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60 GHz Short-Range Wireless Communication"., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 48 (6): 1540 (2013)0.13 μm CMOS Cartesian loop transmitter IC with fast calibration and switching scheme from opened to closed loop., , , , and . ESSCIRC, page 342-345. IEEE, (2008)