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Disambiguation of "Giridhar, Bharan"

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Centip3De: a many-core prototype exploring 3D integration and near-threshold computing.

, , , , , , , , , , , , , , and . Commun. ACM, 56 (11): 97-104 (2013)

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Giridhar Mudduluru

Giridhar Kanuri

 

Other publications of authors with the same name

Integrated 3D-stacked server designs for increasing physical density of key-value stores., , , , , and . ASPLOS, page 485-498. ACM, (2014)Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 48 (1): 104-117 (2013)13.7 A reconfigurable sense amplifier with auto-zero calibration and pre-amplification in 28nm CMOS., , , and . ISSCC, page 242-243. IEEE, (2014)A 660pW multi-stage temperature-compensated timer for ultra-low-power wireless sensor node synchronization., , , , and . ISSCC, page 46-48. IEEE, (2011)Centip3De: A 64-core, 3D stacked, near-threshold system., , , , , , , , , and 5 other author(s). Hot Chips Symposium, page 1-30. IEEE, (2012)Scaling towards kilo-core processors with asymmetric high-radix topologies., , , , , , , and . HPCA, page 496-507. IEEE Computer Society, (2013)Centip3De: A 64-Core, 3D Stacked Near-Threshold System., , , , , , , , , and 5 other author(s). IEEE Micro, 33 (2): 8-16 (2013)Centip3De: a many-core prototype exploring 3D integration and near-threshold computing., , , , , , , , , and 5 other author(s). Commun. ACM, 56 (11): 97-104 (2013)Pulse amplification based dynamic synchronizers with metastability measurement using capacitance de-rating., , , , and . CICC, page 1-4. IEEE, (2013)A Sub-nW Multi-stage Temperature Compensated Timer for Ultra-Low-Power Sensor Nodes., , , , and . IEEE J. Solid State Circuits, 48 (10): 2511-2521 (2013)