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Disambiguation of "Tosun, Suleyman"

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Using Task Recomputation During Application Mapping in Parallel Embedded Architectures.

, , and . CDES, page 29-35. CSREA Press, (2006)

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Tosun Terzioğlu

Jale Tosun

Haluk Tosuner

Selcuk Tosuner

Antonis Tosunidis

 

Other publications of authors with the same name

HAFTA: Highly adaptive fault-tolerant routing algorithm for two-dimensional network-on-chips., , and . Concurr. Comput. Pract. Exp., (2021)Computation Power and Energy Optimized Task Allocation in Internet of Things., , and . IEEE Trans. Netw. Serv. Manag., 19 (4): 4424-4433 (December 2022)Mapping application-specific topology to mesh topology with reconfigurable switches., , , and . IET Comput. Digit. Tech., 14 (1): 9-16 (2020)Application mapping algorithms for mesh-based network-on-chip architectures., , , and . J. Supercomput., 71 (3): 995-1017 (2015)Energy- and reliability-aware task scheduling onto heterogeneous MPSoC architectures.. J. Supercomput., 62 (1): 265-289 (2012)Energy-aware partitioning of fault-tolerant irregular topologies for 3D network-on-chips., and . J. Supercomput., 74 (9): 4842-4863 (2018)Fault-Tolerant Topology Generation Method for Application-Specific Network-on-Chips., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (9): 1495-1508 (2015)Library Characterization of Arithmetic Circuits for Reliability-Aware Designs in SRAM-Based FPGAs., , and . J. Electron. Test., 36 (6): 743-756 (2020)On-Chip Memory Management for Embedded MpSoC Architectures Based on Data Compression., , , and . SoCC, page 175-178. IEEE, (2005)Constraint-based Code mapping for heterogeneous Chip multiprocessors., , , and . SoCC, page 89-90. IEEE, (2005)