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Global Hardware Synthesis from Behavioral Dataflow Descriptions.

, , , and . DAC, page 456-461. IEEE Computer Society Press, (1990)

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System-Level Specification and Design Using VHDL: A Case Study., and . CHDL, volume A-32 of IFIP Transactions, page 505-522. North-Holland, (1993)Subtype concept of VHDL for synthesis constraints., and . EURO-DAC, page 720-725. IEEE Computer Society Press, (1992)The Siemens high-level synthesis system CALLAS., , , , , , , , , and 1 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 1 (3): 244-253 (1993)An approach to guided incremental specification., and . EURO-DAC, page 368-373. IEEE Computer Society, (1995)A reuse scenario for the VHDL-based hardware design flow., , , and . EURO-DAC, page 464-469. IEEE Computer Society, (1995)