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Automated Generation of Security Assertions for RTL Models., , , and . ACM J. Emerg. Technol. Comput. Syst., 19 (1): 8:1-8:27 (January 2023)Sequence-Based Incremental Concolic Testing of RTL Models., , and . CoRR, (2023)Information Leakage through Physical Layer Supply Voltage Coupling Vulnerability., , and . CoRR, (2024)HIVE: Scalable Hardware-Firmware Co-Verification using Scenario-based Decomposition and Automated Hint Extraction., and . CoRR, (2023)Logic Locking based Trojans: A Friend Turns Foe., , , and . CoRR, (2023)Design for Trust Utilizing Rareness Reduction., and . VLSID, page 437-442. IEEE, (2024)Scalable Detection of Hardware Trojans Using ATPG-Based Activation of Rare Events., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (12): 4450-4462 (December 2023)TVLA*: Test Vector Leakage Assessment on Hardware Implementations of Asymmetric Cryptography Algorithms., , and . IEEE Trans. Very Large Scale Integr. Syst., 31 (9): 1269-1279 (September 2023)Efficient Finite State Machine Encoding for Defending Against Laser Fault Injection Attacks., , and . ICCD, page 247-254. IEEE, (2022)Network-on-Chip Trust Validation Using Security Assertions., , , , and . J. Hardw. Syst. Secur., 6 (3-4): 79-94 (2022)