Author of the publication

SURFEX: A 57fps 1080P resolution 220mW silicon implementation for simplified speeded-up robust feature with 65nm process.

, , , , , and . CICC, page 1-4. IEEE, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Efficient memory partitioning for parallel data access in multidimensional arrays., , , , and . DAC, page 160:1-160:6. ACM, (2015)An efficient hardware design for cerebellar models using approximate circuits: special session paper., , and . CODES+ISSS, page 31:1-31:2. ACM, (2017)Adaptive approximation in arithmetic circuits: A low-power unsigned divider design., , , and . DATE, page 1411-1416. IEEE, (2018)A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures., , , , , and . ASP-DAC, page 48-53. IEEE, (2015)An ASIC implementation of JPEG2000 codec., , , and . CICC, page 691-694. IEEE, (2005)Reliability-aware mapping for various NoC topologies and routing algorithms under performance constraints., , , , , and . Sci. China Inf. Sci., 58 (8): 1-14 (2015)An efficient VLSI architecture of speeded-up robust feature extraction for high resolution and high frame rate video., , , , , and . Sci. China Inf. Sci., 56 (7): 1-14 (2013)MapReduce inspired loop mapping for coarse-grained reconfigurable architecture., , , and . Sci. China Inf. Sci., 57 (12): 1-14 (2014)Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution., , , , and . IEEE Comput. Archit. Lett., 17 (2): 147-150 (2018)Battery aware tasks allocating algorithm for multi-battery operated system., , , and . APCCAS, page 875-878. IEEE, (2010)