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Low-cost, high-performance branch predictors for soft processors., , and . FPL, page 1-6. IEEE, (2013)Caliper: a tool to generate precise and closed-loop traffic., , , , , , and . SIGCOMM, page 445-446. ACM, (2010)An Efficient Non-blocking Data Cache for Soft Processors., and . ReConFig, page 19-24. IEEE Computer Society, (2010)NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution., and . Int. J. Reconfigurable Comput., (2012)Exploiting Speculation Cost Prediction in Power-Aware Applications., , and . J. Low Power Electron., 3 (1): 43-53 (2007)Computational and storage power optimizations for the O-GEHL branch predictor., , and . Conf. Computing Frontiers, page 105-112. ACM, (2007)Design space exploration of instruction schedulers for out-of-order soft processors., and . FPT, page 385-388. IEEE, (2010)What limits the operating frequency of a soft processor design., and . ReConFig, page 1-6. IEEE, (2014)Low-Power Perceptron Branch Predictor., and . J. Low Power Electron., 2 (3): 333-341 (2006)CycloneNTT: An NTT/FFT Architecture Using Quasi-Streaming of Large Datasets on DDR- and HBM-based FPGA Platforms., , , , , and . IACR Cryptol. ePrint Arch., (2022)