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Disambiguation of "Saripalli, Vinay"

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Analyzing Energy-Delay Behavior in Room Temperature Single Electron Transistors.

, , and . VLSI Design, page 399-404. IEEE Computer Society, (2010)

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Vinay Suryaprakash

Vinay Bettadapura

Vinay Vijayakumar

Vinay Devadas

Vinay Setty

 

Other publications of authors with the same name

Design space exploration of workload-specific last-level caches., , , , and . ISLPED, page 243-248. ACM, (2012)Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores., , , , , and . ISLPED, page 247-252. IEEE/ACM, (2011)Exploiting Heterogeneity for Energy Efficiency in Chip Multiprocessors., , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 1 (2): 109-119 (2011)Analyzing Energy-Delay Behavior in Room Temperature Single Electron Transistors., , and . VLSI Design, page 399-404. IEEE Computer Society, (2010)An energy-efficient heterogeneous CMP based on hybrid TFET-CMOS cores., , , and . DAC, page 729-734. ACM, (2011)Variation-tolerant ultra low-power heterojunction tunnel FET SRAM design., , , and . NANOARCH, page 45-52. IEEE Computer Society, (2011)Reconfigurable BDD based quantum circuits., , , and . NANOARCH, page 61-67. IEEE Computer Society, (2008)Steep-Slope Devices: From Dark to Dim Silicon., , , , , and . IEEE Micro, 33 (5): 50-59 (2013)Ultra Low Energy Binary Decision Diagram Circuits Using Few Electron Transistors., , and . NanoNet, volume 20 of Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, page 200-209. Springer, (2009)Design of energy-efficient circuits and systems using tunnel field effect transistors., , , , , , and . IET Circuits Devices Syst., 7 (5): 294-303 (2013)