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Hardware Acceleration for Third-Generation FHE and PSI Based on It., , , and . CoRR, (2022)Audio and Image Cross-Modal Intelligence via a 10TOPS/W 22nm SoC with Back-Propagation and Dynamic Power Gating., , , , , , , , , and 7 other author(s). VLSI Technology and Circuits, page 18-19. IEEE, (2022)A 2.46M Reads/s Seed-Extension Accelerator for Next-Generation Sequencing Using a String-Independent PE Array., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 56 (3): 824-833 (2021)An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM., , , , , , , , , and 2 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)A 28NM Integrated True Random Number Generator Harvesting Entropy from MRAM., , , , , , , and . VLSI Circuits, page 171-172. IEEE, (2018)RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-On-Chip DNN Accelerator., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 56 (4): 1105-1115 (2021)17.3 GCUPS Pruning-Based Pair-Hidden-Markov-Model Accelerator for Next-Generation DNA Sequencing., , , , , and . VLSI Circuits, page 1-2. IEEE, (2020)Energy Efficient Adiabatic FRAM with 0.99 PJ/Bit Write for IoT Applications., , , , , , and . VLSI Circuits, page 85-86. IEEE, (2018)A 1-Mb 28-nm 1T1MTJ STT-MRAM With Single-Cap Offset-Cancelled Sense Amplifier and In Situ Self-Write-Termination., , , , , , , , , and . IEEE J. Solid State Circuits, 54 (1): 231-239 (2019)A 22nm 3.5TOPS/W Flexible Micro-Robotic Vision SoC with 2MB eMRAM for Fully-on-Chip Intelligence., , , , , , , , and . VLSI Technology and Circuits, page 72-73. IEEE, (2022)