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Disambiguation of "Ahn, Jin-Ho"

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NoRSE: noise reduction and state evaluator for high-frequency single event traces.

, , , , , , and . Bioinform., 28 (2): 296-297 (2012)

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Bong-Ho Ahn

Jin-Tae Ahn

Young-Jin Ahn

Jin-Ho Kang

Jin Ho Hwang

 

Other publications of authors with the same name

Implementation of an LED tile controller for high-quality image display.. Displays, 34 (1): 17-26 (2013)A Memory-Efficient Pattern Matching with Hardware-Based Bit-Split String Matchers for Deep Packet Inspection., , , , and . IEICE Trans. Commun., 93-B (2): 396-398 (2010)Total Energy Minimization of Real-Time Tasks in an On-Chip Multiprocessor Using Dynamic Voltage Scaling Efficiency Metric., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (11): 2088-2092 (2008)Route Reinforcement for Efficient QoS Routing Based on Ant Algorithm., , , and . ICOIN, volume 3090 of Lecture Notes in Computer Science, page 342-349. Springer, (2004)A Practical Test Scheduling Using Network-Based TAM in Network on Chip Architecture., , and . Asia-Pacific Computer Systems Architecture Conference, volume 3740 of Lecture Notes in Computer Science, page 614-624. Springer, (2005)Chain-Based Approach for Fast Through-Silicon-Via Coupling Delay Estimation., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (3): 1178-1182 (2017)RAIN (RAndom Insertion) Scheduling Algorithm for SoC Test., , , , and . Asian Test Symposium, page 242-247. IEEE Computer Society, (2004)Noise-Tolerant DAC BIST Scheme Using Integral Calculus Approach., , , , , and . IEICE Trans. Electron., 94-C (8): 1344-1347 (2011)Developing a cognitive evaluation method for serious game engineers., , , , , , and . Clust. Comput., 17 (3): 757-766 (2014)A high performance network-on-chip scheme using lossless data compression., , , , , and . IEICE Electron. Express, 7 (11): 791-796 (2010)