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Simultaneous area and delay minimum K-LUT mapping for K-exact networks., и . Integr., 20 (3): 287-302 (1996)Graph-based techniques to speed up floorplan area optimization., и . Integr., 15 (2): 179-199 (1993)Compacted channel routing with via placement restrictions., и . Integr., 4 (4): 287-307 (1986)Optimal river routing with crosstalk constraints., и . ACM Trans. Design Autom. Electr. Syst., 3 (3): 496-514 (1998)Series-parallel functions and FPGA logic module design., и . ACM Trans. Design Autom. Electr. Syst., 1 (1): 102-122 (1996)Universal switch modules for FPGA design., , и . ACM Trans. Design Autom. Electr. Syst., 1 (1): 80-101 (1996)Planning buffer locations by network flows., и . ISPD, стр. 180-185. ACM, (2000)Slicing floorplans with range constraint., и . ISPD, стр. 97-102. ACM, (1999)Integrated floorplanning and interconnect planning., , , , , и . ICCAD, стр. 354-357. IEEE Computer Society, (1999)Integrated power supply planning and floorplanning., , , , и . ASP-DAC, стр. 589-594. ACM, (2001)