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Другие публикации лиц с тем же именем

Series-parallel functions and FPGA logic module design., и . ACM Trans. Design Autom. Electr. Syst., 1 (1): 102-122 (1996)Universal switch modules for FPGA design., , и . ACM Trans. Design Autom. Electr. Syst., 1 (1): 80-101 (1996)Optimal river routing with crosstalk constraints., и . ACM Trans. Design Autom. Electr. Syst., 3 (3): 496-514 (1998)Simultaneous area and delay minimum K-LUT mapping for K-exact networks., и . Integr., 20 (3): 287-302 (1996)Graph-based techniques to speed up floorplan area optimization., и . Integr., 15 (2): 179-199 (1993)Compacted channel routing with via placement restrictions., и . Integr., 4 (4): 287-307 (1986)Integrated power supply planning and floorplanning., , , , и . ASP-DAC, стр. 589-594. ACM, (2001)Integrated floorplanning and interconnect planning., , , , , и . ICCAD, стр. 354-357. IEEE Computer Society, (1999)A Graph Theoretic Approach to Feed-Through Pin Assignment., и . ISCAS, стр. 1687-1690. IEEE, (1995)Maze routing with buffer insertion and wiresizing., и . DAC, стр. 374-378. ACM, (2000)