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Using PEGs for Automatic Extraction of Memory Access Descriptions to Support Data-Parallel Pattern Recognition., , , and . PARMA-DITAM@HiPEAC, page 13-18. ACM, (2017)Modeling Exclusive Memory Access for a Time-Decoupled Parallel SystemC Simulator., , and . SCOPES, page 129-132. ACM, (2015)Multi-Scale Code Generation for Simulation-Driven Rapid ADAS Prototyping: the SMELT Approach., , , and . ICVES, page 1-8. IEEE, (2018)An FPGA-accelerated testbed for hardware component development in MIMO wireless communication systems., , , , , , and . ICSAMOS, page 278-285. IEEE, (2012)Automatic recognition of computational kernels for platform-dependent code optimizations., , , and . SAMOS, page 11-20. IEEE, (2016)Concurrent memory subsystem and application optimization for ASIP design., , , and . SAMOS, page 1-10. IEEE, (2016)Pre-architectural performance estimation for ASIP design based on abstract processor models., , , , and . ICSAMOS, page 133-140. IEEE, (2014)Handover prediction for long-term window scheduling based on SINR maps., , and . PIMRC, page 917-921. IEEE, (2013)On the performance of EVD-based channel estimations in MU-Massive-MIMO systems., , and . PIMRC, page 1376-1380. IEEE, (2013)Asymptotic BER Analysis for MIMO-BICM with MMSE Detection and Channel Estimation., , , and . ICC, page 1-5. IEEE, (2011)