Author of the publication

Layout-Aware Synthesis Methodology for Analog Systems Based on Combined Block Sizing, Floorplanning and Global Routing.

, and . IWLS, page 41-44. (2002)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Improved sound-based localization through a network of reconfigurable mixed-signal nodes., , and . ROSE, page 86-91. IEEE, (2010)An axiomatic model for concept structure description and its application to circuit design., , and . Knowl. Based Syst., (2013)Customization of Arbitration Policies and Buffer Space Distribution Using Continuous-Time Markov Decision Processes., and . IEEE Trans. Very Large Scale Integr. Syst., 15 (2): 240-245 (2007)Systematic development of analog circuit structural macromodels through behavioral model decoupling., and . DAC, page 57-62. ACM, (2005)Reconfigurable DeltaSigma modulator topology design through hierarchical mapping and constraint extraction., and . Integr., 42 (2): 116-127 (2009)Analog Circuit Design Knowledge Mining: Discovering Topological Similarities and Uncovering Design Reasoning Strategies., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (7): 1045-1058 (2015)Structural Macromodeling of Analog Circuits Through Model Decoupling and Transformation., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (4): 712-725 (2008)Symbolic Matching and Constraint Generation for Systematic Comparison of Analog Circuits., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (4): 616-629 (2013)Exploration-based high-level synthesis of linear analog systems operating at low/medium frequencies., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (11): 1556-1568 (2003)A goal-oriented programming framework for grid sensor networks with reconfigurable embedded nodes., , , and . ACM Trans. Embed. Comput. Syst., 11 (4): 79:1-79:30 (2012)