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Disambiguation of "Ma, Zhen-Guo"

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FPGA-Accelerated Hash Join Operation for Relational Databases.

, , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (10): 1919-1923 (2020)

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Zhen Ma

Zhen Guo

Zhen-Guo You

Jian-Guo Ma

Zhen Cao

 

Other publications of authors with the same name

A Fused Continuous Floating-Point MAC on FPGA., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 101-A (9): 1594-1598 (2018)FPGA-Accelerated Hash Join Operation for Relational Databases., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (10): 1919-1923 (2020)A Novel Memory-Based FFT Architecture for Real-Valued Signals Based on a Radix-2 Decimation-In-Frequency Algorithm., , and . IEEE Trans. Circuits Syst. II Express Briefs, 62-II (9): 876-880 (2015)A Continuous-Flow Memory-Based Architecture for Real-Valued FFT., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (11): 1352-1356 (2017)Time Delay Estimation via Co-Prime Aliased Sparse FFT., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 99-A (12): 2566-2570 (2016)Pipelined Algorithm and Modular Architecture for Matrix Transposition., , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (4): 652-656 (2019)Resource-Efficient Pipelined Architectures for Radix-2 Real-Valued FFT With Real Datapaths., , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (8): 803-807 (2016)Efficient Circuit for Parallel Bit Reversal., , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (4): 381-385 (2016)Resource-Efficient Parallel Tree-Based Join Architecture on FPGA., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (1): 111-115 (2019)An efficient radix-2 fast Fourier transform processor with ganged butterfly engines on field programmable gate arrays., , , and . J. Zhejiang Univ. Sci. C, 12 (4): 323-329 (2011)