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A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset Self-Recoverable Latch.

A. Yan, K. Qian, J. Cui, N. Cui, T. Ni, Z. Huang, and X. Wen. NANOARCH, page 1-6. IEEE, (2021)

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Aibin Liang

Yan Yan

Shanshan Yan

Americanization in China: an analysis of General Motors and its strategies in ChinaS. Yan. Uni Mainz, (2009)

Yan Xu

Untersuchungen zur Verleimung von Holz und Holzspanplatten mit UF-Leimharzen und PMDIY. Xu. TU Braunschweig, (2009)

Yan Zhang

Other publications of authors with the same name

Design of a Novel Self-Recoverable SRAM Cell Protected Against Soft Errors.A. Yan, J. Zhou, Y. Hu, Y. Chen, Z. Wu, and T. Ni. DSA, page 497-498. IEEE, (2019)Architecture of Cobweb-Based Redundant TSV for Clustered Faults.T. Ni, D. Liu, Q. Xu, Z. Huang, H. Liang, and A. Yan. IEEE Trans. Very Large Scale Integr. Syst., 28 (7): 1736-1739 (2020)Novel Low Cost, Double-and-Triple-Node-Upset-Tolerant Latch Designs for Nano-scale CMOS.A. Yan, C. Lai, Y. Zhang, J. Cui, Z. Huang, J. Song, J. Guo, and X. Wen. IEEE Trans. Emerg. Top. Comput., 9 (1): 520-533 (2021)Two Highly Reliable and High-Speed SRAM Cells for Safety-Critical Applications.A. Yan, Y. Chang, J. Xiang, H. Luo, J. Cui, Z. Huang, T. Ni, and X. Wen. ACM Great Lakes Symposium on VLSI, page 293-298. ACM, (2023)Aging-Temperature-and-Propagation Induced Pulse-Broadening Aware Soft Error Rate Estimation for nano-Scale CMOS.A. Yan, Y. Ling, K. Yang, Z. Chen, and M. Yi. ATS, page 86-91. IEEE, (2018)Novel Application of Deep Learning for Adaptive Testing Based on Long Short-Term Memory.T. Song, H. Liang, Y. Sun, Z. Huang, M. Yi, X. Fang, and A. Yan. VTS, page 1-6. IEEE, (2019)IDLD: Interlocked Dual-Circle Latch Design with Low Cost and Triple-Node-Upset-Recovery for Aerospace Applications.A. Yan, C. Dong, X. Guo, J. Song, J. Cui, T. Ni, P. Girard, and X. Wen. ACM Great Lakes Symposium on VLSI, page 19-24. ACM, (2024)MURLAV: A Multiple-Node-Upset Recovery Latch and Algorithm-Based Verification Method.A. Yan, Z. Li, Z. Gao, J. Zhang, Z. Huang, T. Ni, J. Cui, X. Wang, P. Girard, and X. Wen. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (7): 2205-2214 (July 2024)Radiation Hardening by Design of a Novel Double-Node-Upset-Tolerant Latch Combined with Layout Technique.A. Yan, Z. Chen, Z. Huang, X. Fang, M. Yi, and J. Guo. ITC-Asia, page 49-54. IEEE, (2018)Efficient design approaches to CMOS full adder circuits.A. Yan, H. Bao, W. Jiang, J. Cui, Z. Huang, and X. Wen. Microelectron. J., (2024)

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Disambiguation of "Yan, Aibin"

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A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset Self-Recoverable Latch.

Please choose a person to relate this publication to

Aibin Liang

Yan Yan

Shanshan Yan

Yan Xu

Yan Zhang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yan, Aibin"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset Self-Recoverable Latch.

Please choose a person to relate this publication to

Aibin Liang

Yan Yan

Shanshan Yan

Yan Xu

Yan Zhang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset Self-Recoverable Latch.