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1.2 V 10-bit 75 MS/s Pipelined ADC With Phase-Dependent Gain-Transition CDS.

, , , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (3): 585-592 (2014)

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A 9-bit, 110-MS/s pipelined-SAR ADC using time-interleaved technique with shared comparator., , , , and . SoCC, page 170-174. IEEE, (2015)A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (3): 169-173 (2011)1.2 V 10-bit 75 MS/s Pipelined ADC With Phase-Dependent Gain-Transition CDS., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (3): 585-592 (2014)Error Contributions during MEMS Gyroscope Calibration by Chip-Scale Micro-Stage with Capacitive Motion Sensor., , , , and . AIM, page 586-592. IEEE, (2018)Modeling and calibration of a capacitive threshold sensor for in situ calibration of MEMS gyroscope., , , and . AIM, page 999-1004. IEEE, (2016)Power-Gating Noise Minimization by Three-Step Wake-Up Partitioning., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (4): 749-762 (2012)High-resolution and wide-dynamic range time-to-digital converter with a multi-phase cyclic Vernier delay line., , , , , , , and . ESSCIRC, page 311-314. IEEE, (2013)High-speed 10-bit LCD column driver with a split DAC and a class-AB output buffer., , , and . IEEE Trans. Consumer Electronics, 55 (3): 1431-1438 (2009)A 14.6 ps Resolution, 50 ns Input-Range Cyclic Time-to-Digital Converter Using Fractional Difference Conversion Method., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (12): 3064-3072 (2010)A high-resolution and fast-conversion readout circuit for differential capacitive sensors., , , and . SoCC, page 44-47. IEEE, (2010)