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Disambiguation of "Beerel, Peter A."

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Proteus: An ASIC Flow for GHz Asynchronous Designs.

, , and . IEEE Des. Test Comput., 28 (5): 36-51 (2011)

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Peter A Ehrl

Peter A Schmid

Peter A Wuffli

Peter A Ehrl

Peter A Gloor

 

Other publications of authors with the same name

Pre-Defined Sparse Neural Networks With Hardware Acceleration., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 9 (2): 332-345 (2019)Slack matching mode-based asynchronous circuits for average-case performance., and . ICCAD, page 219-225. IEEE, (2013)A memory allocation and assignment method using multiway partitioning., , and . SoCC, page 143-144. IEEE, (2004)High Level Modeling of Channel-Based Asynchronous Circuits Using Verilog., and . CPA, volume 63 of Concurrent Systems Engineering Series, page 275-288. IOS Press, (2005)SystemVerilogCSP: Modeling Digital Asynchronous Circuits Using SystemVerilog Interfaces., and . CPA, volume 68 of Concurrent Systems Engineering Series, page 287-302. IOS Press, (2011)Toward Efficient Hyperspectral Image Processing inside Camera Pixels., , , , and . CoRR, (2022)qBSA: Logic Design of a 32-bit Block-Skewed RSFQ Arithmetic Logic Unit., , , and . CoRR, (2020)Towards a Formal Treatment of Logic Locking., , , , and . IACR Cryptol. ePrint Arch., (2022)Area-Efficient Asynchronous Multilevel Single-Track Pipeline Template., and . IEEE Trans. Very Large Scale Integr. Syst., 22 (4): 838-849 (2014)Efficient asynchronous bundled-data pipelines for DCT matrix-vector multiplication., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 13 (4): 448-461 (2005)