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Disambiguation of "D., Sai Manoj P."

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A Scalable Network-on-Chip Microprocessor With 2.5D Integrated Memory and Accelerator.

, , , , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (6): 1432-1443 (2017)

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Slavica Manojlovic

Sai Li

Manoj Kakkassery

Manoj Khanal

Sai Zhang

 

Other publications of authors with the same name

A Q-Learning Based Self-Adaptive I/O Communication for 2.5D Integrated Many-Core Microprocessor and Memory., , , and . IEEE Trans. Computers, 65 (4): 1185-1196 (2016)A scalable and reconfigurable 2.5D integrated multicore processor on silicon interposer., , , , , and . CICC, page 1-4. IEEE, (2015)A 2.5-D Memory-Logic Integration With Data-Pattern-Aware Memory Controller., , , , , and . IEEE Des. Test, 32 (4): 49-58 (2015)Securing AI Hardware: Challenges in Detecting and Mitigating Hardware Trojans in ML Accelerators., , , , , , and . MWSCAS, page 821-825. IEEE, (2023)Characterization of AES Implementations on Microprocessor-based IoT Devices., , , , , and . WCNC, page 55-60. IEEE, (2022)On Custom LUT-based Obfuscation., , , , , and . ACM Great Lakes Symposium on VLSI, page 477-482. ACM, (2019)A Reinforced Learning Solution for Clock Skew Engineering to Reduce Peak Current and IR Drop., , , , , and . ACM Great Lakes Symposium on VLSI, page 181-187. ACM, (2021)Iron-Dome: Securing IoT Networked Systems at Runtime by Network and Device Characteristics to Confine Malware Epidemics., , , , and . ICCD, page 259-262. IEEE, (2022)Compressive Sensing on Storage Data: An Effective Solution to Alleviate I/0 Bottleneck in Data- Intensive Workloads., , , , and . ASAP, page 1-8. IEEE Computer Society, (2018)Silicon validation of LUT-based logic-locked IP cores., , , , , , , , and . DAC, page 1189-1194. ACM, (2022)