( en | de | ru )

 

Disambiguation of "Manem, Harika"

Author of the publication

copydeleteadd this publication to your clipboard
A hybrid cmos/nano fpga architecture built fromprogrammable majority logic arrays.

, , and . ACM Great Lakes Symposium on VLSI, page 249-254. ACM, (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Franz-Josef Manemann

Anne-Katrin Manemann

Jürgen Manemann

Walburga Manemann

Barbara Manemann

 

Other publications of authors with the same name

Design Considerations for Multilevel CMOS/Nano Memristive Memory., , and . JETC, 8 (1): 6:1-6:22 (2012)Techniques for Improved Reliability in Memristive Crossbar PUF Circuits., , , , , , and . ISVLSI, page 212-217. IEEE Computer Society, (2016)An Approach to Tolerate Process Related Variations in Memristor-Based Applications., , , and . VLSI Design, page 18-23. IEEE Computer Society, (2011)The effects of logic partitioning in a majority logic based CMOS-NANO FPGA., and . ACM Great Lakes Symposium on VLSI, page 157-160. ACM, (2009)A hybrid cmos/nano fpga architecture built fromprogrammable majority logic arrays., , and . ACM Great Lakes Symposium on VLSI, page 249-254. ACM, (2008)A read-monitored write circuit for 1T1M multi-level memristor memories., and . ISCAS, page 2938-2941. IEEE, (2011)Design considerations for variation tolerant multilevel CMOS/Nano memristor memory., , , and . ACM Great Lakes Symposium on VLSI, page 287-292. ACM, (2010)An Energy-Efficient Memristive Threshold Logic Circuit., , , and . IEEE Trans. Computers, 61 (4): 474-487 (2012)Memristor based programmable threshold logic array., , , and . NANOARCH, page 5-10. IEEE Computer Society, (2010)An extendable multi-purpose 3D neuromorphic fabric using nanoscale memristors., , , , , and . CISDA, page 1-8. IEEE, (2015)