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Image and video processing platform for field programmable gate arrays using a high-level synthesis.

, , , , and . IET Comput. Digit. Tech., 6 (6): 414-425 (2012)

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Performance evaluation of multi-gate fets using the BSIM-CMG model., , and . EIT, page 256-259. IEEE, (2014)A high-level synthesis and verification tool for fixed to floating point conversion., , and . MWSCAS, page 908-911. IEEE, (2012)Real-time traffic sign detection and recognition for in-car driver assistance systems., , , and . MWSCAS, page 976-979. IEEE, (2012)A Dataflow Processor as the Basis of a Tiled Polymorphic Computing Architecture with Fine-Grain Instruction Migration., , and . IEEE Trans. Parallel Distributed Syst., 29 (10): 2164-2175 (2018)Dynamically Reconfigurable Architecture Design for Ultrasonic Imaging., and . IEEE Trans. Instrumentation and Measurement, 58 (8): 2856-2866 (2009)Communication challenges in a multi-sensor closed-loop artificial pancreas system., , , , and . Wireless Health, page 117-121. IEEE, (2016)Fast memory addressing scheme for radix-4 FFT implementation., , and . EIT, page 437-440. IEEE, (2009)Fast Chirplet Transform With FPGA-Based Implementation., , and . IEEE Signal Process. Lett., (2008)Implementation of an artificial pancreas system on a mobile device., , , , and . EIT, page 642-647. IEEE, (2016)Hardware Efficient Implementation of an Ultrasonic Non-Destructive Evaluation Algorithm based on DeepLearning., , and . MWSCAS, page 1-4. IEEE, (2022)