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Disambiguation of "Jerraya, Ahmed Amine"

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System-on-a-Chip Cosimulation and Compilation.

, , , , and . IEEE Des. Test Comput., 14 (2): 16-25 (1997)

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Wassim Amine

Abu Bakr Ahmed Amine Nassr

Amine Chaieb

Amine Ahriche

Amine Bouabdallah

 

Other publications of authors with the same name

AMICAL: Architectural Synthesis based on VHDL., , and . Synthesis for Control Dominated Circuits, volume A-22 of IFIP Transactions, page 219-234. North-Holland, (1992)Scheduling with accurate communication delay model and scheduler implementation for multiprocessor system-on-chip., , , , and . Des. Autom. Embed. Syst., 11 (2-3): 167-191 (2007)Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration., , , , and . ASP-DAC, page 969-972. ACM Press, (2005)Interactive System-level Partitioning with PARTIF., , and . EDAC-ETC-EUROASIC, page 464-468. IEEE Computer Society, (1994)A Scalable and Adaptable ILP-Based Approach for Task Mapping on MPSoC Considering Load Balance and Communication Optimization., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (9): 1744-1757 (2019)Communication Optimizations for Multithreaded Code Generation from Simulink Models., , , , , , , and . ACM Trans. Embed. Comput. Syst., 14 (3): 59:1-59:26 (2015)A Loop-Based Scheduling Algorithm for Hardware Description Languages., , and . Parallel Process. Lett., (1994)System-on-a-Chip Cosimulation and Compilation., , , , and . IEEE Des. Test Comput., 14 (2): 16-25 (1997)A unified model for co-simulation and co-synthesis of mixed hardware/software systems., , , , , and . ED&TC, page 180-184. IEEE Computer Society, (1995)Cycle-True Simulation of the ST10 Microcontroller Including the Core and the Peripherals., and . IEEE International Workshop on Rapid System Prototyping, page 60-65. IEEE Computer Society, (2000)