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Design of a scalable nanophotonic interconnect for future multicores., and . ANCS, page 113-122. ACM, (2009)Energy-efficient adaptive wireless NoCs architecture., , , , , and . NOCS, page 1-8. IEEE, (2013)Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance., , and . MICRO, page 282-293. IEEE Computer Society, (2012)Bandwidth Adaptive Nanophotonic Crossbars with Clockwise/Counter-clockwise Optical Routing., and . VLSID, page 123-128. IEEE Computer Society, (2015)Implementation of Dynamic Bandwidth Re-allocation in Optical Interconnects using Microring Resonators., , and . Hot Interconnects, page 54-64. IEEE Computer Society, (2007)Extending the Performance and Energy-Efficiency of Shared Memory Multicores with Nanophotonic Technology., , and . IEEE Trans. Parallel Distributed Syst., 25 (1): 83-92 (2014)A-WiNoC: Adaptive Wireless Network-on-Chip Architecture for Chip Multiprocessors., , , , , and . IEEE Trans. Parallel Distributed Syst., 26 (12): 3289-3302 (2015)Power-Efficient and High-Performance Multi-level Hybrid Nanophotonic Interconnect for Multicores., and . NOCS, page 207-214. IEEE Computer Society, (2010)Secure Model Checkers for Network-on-Chip (NoC) Architectures., , and . ACM Great Lakes Symposium on VLSI, page 45-50. ACM, (2016)GARUDA: Designing Energy-Efficient Hardware Monitors From High-Level Policies for Secure Information Flow., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (11): 2509-2518 (2018)