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Disambiguation of "Jayasena, Nuwan"

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Understanding idle behavior and power gating mechanisms in the context of modern benchmarks on CPU-GPU Integrated systems.

, , , , and . HPCA, page 366-377. IEEE Computer Society, (2015)

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Other publications of authors with the same name

DVFS Space Exploration in Power Constrained Processing-in-Memory Systems., , , and . ARCS, volume 10172 of Lecture Notes in Computer Science, page 221-233. Springer, (2017)Computation vs. Communication Scaling for Future Transformers on Future Hardware., , , , and . CoRR, (2023)Horton Tables: Fast Hash Tables for In-Memory Data-Intensive Computing., , , , and . USENIX Annual Technical Conference, page 281-294. USENIX Association, (2016)Smart Memories: a modular reconfigurable architecture., , , , , and . ISCA, page 161-171. IEEE Computer Society, (2000)MemPod: A Clustered Architecture for Efficient and Scalable Migration in Flat Address Space Multi-level Memories., , , , and . HPCA, page 433-444. IEEE Computer Society, (2017)T3: Transparent Tracking & Triggering for Fine-grained Overlap of Compute & Collectives., , , , and . ASPLOS (2), page 1146-1164. ACM, (2024)Prefetching Techniques for Near-memory Throughput Processors., , , , , and . ICS, page 40:1-40:14. ACM, (2016)Understanding idle behavior and power gating mechanisms in the context of modern benchmarks on CPU-GPU Integrated systems., , , , and . HPCA, page 366-377. IEEE Computer Society, (2015)RegMutex: Inter-Warp GPU Register Time-Sharing., , , , and . ISCA, page 816-828. IEEE Computer Society, (2018)A Research Retrospective on AMD's Exascale Computing Journey., , , , , , , , , and 61 other author(s). ISCA, page 81:1-81:14. ACM, (2023)