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Challenges and targets of MRAM-enabled scaled spintronic logic circuits., , , , , , , , , and 1 other author(s). CoRR, (2022)Spin Wave Based 4-2 Compressor., , , , , and . ICECS, page 1-4. IEEE, (2021)Fan-out of 2 Triangle Shape Spin Wave Logic Gates., , , , , and . DATE, page 948-953. IEEE, (2021)n-bit Data Parallel Spin Wave Logic Gate., , , , , and . DATE, page 642-645. IEEE, (2020)Would Magnonic Circuits Outperform CMOS Counterparts?, , , , , , and . ACM Great Lakes Symposium on VLSI, page 309-313. ACM, (2022)Two Cascaded Spin Wave Majority Gates Operation Under Continuous and Pulse Modes., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 71 (4): 1919-1923 (April 2024)Strontium doped hafnium oxide thin films: Wide process window for ferroelectric memories., , , , , , , , and . ESSDERC, page 260-263. IEEE, (2013)2-Output Spin Wave Programmable Logic Gate., , , , , and . ISVLSI, page 60-65. IEEE, (2020)The first observation of p-type electromigration failure in full ruthenium interconnects., , , , , , , and . IRPS, page 6. IEEE, (2018)Spin Wave Threshold Logic Gates., , , , , and . NANOARCH, page 31:1-31:6. ACM, (2023)