From post

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

 

Другие публикации лиц с тем же именем

Tokio: Logic Programming Language Based on Temporal Logic and its Compilation to Prolog., , , и . ICLP, том 225 из Lecture Notes in Computer Science, стр. 695-709. Springer, (1986)Interconnect-aware Pipeline Synthesis for Array based Reconfigurable Architectures., , , и . IESS, том 231 из IFIP Advances in Information and Communication Technology, стр. 121-134. Springer, (2007)A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs., , , , , , , , , и 1 other автор(ы). VLSI Circuits, стр. 48-. IEEE, (2019)SDR-4X II: A Small Humanoid as an Entertainer in Home Environment., , , , и . ISRR, том 15 из Springer Tracts in Advanced Robotics, стр. 355-364. Springer, (2003)An Incremental Automatic Test Pattern Generation Method for Multiple Stuck-at Faults., , и . VTS, стр. 1-6. IEEE, (2019)Automated data analysis techniques for a modern silicon debug environment., , , и . ASP-DAC, стр. 298-303. IEEE, (2012)Post-silicon patching for verification/debugging with high-level models and programmable logic., и . ASP-DAC, стр. 232-237. IEEE, (2012)Formally analyzing fault tolerance in datapath designs using equivalence checking., , , и . ASP-DAC, стр. 133-138. IEEE, (2016)Improving polynomial datapath debugging with HEDs., , , , и . ETS, стр. 1-6. IEEE, (2014)Analysis and testing on delays with two time frames.. VLSI-SoC, стр. 13-18. IEEE, (2015)