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Core-Level Modeling and Frequency Prediction for DSP Applications on FPGAs.

, , , and . Int. J. Reconfigurable Comput., (2015)

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Energy Advantages of Microprocessor Platforms with On-Chip Configurable Logic., and . IEEE Des. Test Comput., 19 (6): 36-43 (2002)Elastic computing: A portable optimization framework for hybrid computers., and . Parallel Comput., 38 (8): 438-464 (2012)A Parallel Sliding-Window Generator for High-Performance Digital-Signal Processing on FPGAs., , and . ACM Trans. Reconfigurable Technol. Syst., 9 (3): 23:1-23:22 (2016)A first-step towards an architecture tuning methodology for low power., , , and . CASES, page 187-192. ACM, (2000)VirtualRC: a virtual FPGA platform for applications and tools portability., , , and . FPGA, page 205-208. ACM, (2012)Dynamic hardware/software partitioning: a first approach., , and . DAC, page 250-255. ACM, (2003)Novo-G: A View at the HPC Crossroads for Scientific Computing., , , , and . ERSA, page 21-30. CSREA Press, (2010)Machine Learning-based Prediction for Dynamic Architectural Optimizations., , and . IGSC, page 1-6. IEEE, (2019)Using On-Chip Configurable Logic to Reduce Embedded System Software Energy., , , and . FCCM, page 143-151. IEEE Computer Society, (2002)Low-Latency, Line-Rate Variable-Length Field Parsing for 100+ Gb/s Ethernet., , and . FPGA, page 12-21. ACM, (2024)