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Disambiguation of "Togawa, Nozomu"

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Area/delay estimation for digital signal processor cores.

, , , , and . ASP-DAC, page 156-161. ACM, (2001)

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Other publications of authors with the same name

A Bit-Write-Reducing and Error-Correcting Code Generation Method by Clustering ECC Codewords for Non-Volatile Memories., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 99-A (12): 2398-2411 (2016)Hardware Trojan Detection and Classification Based on Logic Testing Utilizing Steady State Learning., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 101-A (12): 2308-2319 (2018)A High-Speed Trace-Driven Cache Configuration Simulator for Dual-Core Processor L1 Caches., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 96-A (6): 1283-1292 (2013)Scan-based attack against Trivium stream cipher independent of scan structure., , and . ASICON, page 1-4. IEEE, (2013)A floorplan-driven high-level synthesis algorithm with multiple-operation chainings based on path enumeration., , and . ISCAS, page 2129-2132. IEEE, (2015)An Effective Stochastic Number Duplicator and Its Evaluations Using Composite Arithmetic Circuits., , , and . IOLTS, page 53-56. IEEE, (2018)A Trojan-invalidating Circuit Based on Signal Transitions and Its FPGA Implementation., , and . ISCAS, page 1-5. IEEE, (2018)Pedestrian navigation based on landmark recognition using glass-type wearable devices., , , , and . GCCE, page 1-2. IEEE, (2016)A safe and comprehensive route finding method for pedestrian based on lighting and landmark., , , , and . GCCE, page 1-5. IEEE, (2016)Floorplan-driven high-level synthesis using volatile/non-volatile registers for hybrid energy-harvesting systems., , and . ASICON, page 64-67. IEEE, (2017)