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Utilizing Valley-Spin Hall Effect in WSe2 for Low Power Non-Volatile Flip-Flop Design.

, , , , , и . DRC, стр. 1-2. IEEE, (2020)

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Sandeep Sadanandan

Sandeep Ameta

Sandeep Kumar

Sandeep Nambiar

Sandeep Pal

 

Другие публикации лиц с тем же именем

Computing with ferroelectric FETs: Devices, models, systems, and applications., , , , , , , , , и 9 other автор(ы). DATE, стр. 1289-1298. IEEE, (2018)Non-Volatile Memory utilizing Reconfigurable Ferroelectric Transistors to enable Differential Read and Energy-Efficient In-Memory Computation., , , и . ISLPED, стр. 1-6. IEEE, (2019)Valley-Coupled-Spintronic Non-Volatile Memories with Compute-In-Memory Support., , , , , , , , и . CoRR, (2019)IPS-CiM: Enhancing Energy Efficiency of Intermittently-Powered Systems with Compute-in-Memory., , , и . ICCD, стр. 368-376. IEEE, (2020)CTCG: Charge-trap based camouflaged gates for reverse engineering prevention., , , , , , и . HOST, стр. 103-110. IEEE Computer Society, (2018)WSe2 based Valley-Coupled-Spintronic Devices for Low Power Non-Volatile Memories., , , , , , , и . DRC, стр. 211-212. IEEE, (2019)Polarization-induced Strain-coupled TMD FETs (PS FETs) for Non-Volatile Memory Applications., , , , , и . DRC, стр. 1-2. IEEE, (2020)A 1.67Tb, 5b/Cell Flash Memory Fabricated in 192-Layer Floating Gate 3D-NAND Technology and Featuring a 23.3Gb/mm2 Bit Density., , , , , , , , , и 34 other автор(ы). ISSCC, стр. 400-401. IEEE, (2023)Dual Mode Ferroelectric Transistor based Non-Volatile Flip-Flops for Intermittently-Powered Systems., , , , , , и . ISLPED, стр. 31:1-31:6. ACM, (2018)Utilizing Valley-Spin Hall Effect in WSe2 for Low Power Non-Volatile Flip-Flop Design., , , , , и . DRC, стр. 1-2. IEEE, (2020)