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Disambiguation of "Neuendorffer, Stephen"

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SPADES: A Productive Design Flow for Versal Programmable Logic.

, , , and . FPL, page 65-71. IEEE, (2023)

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Stephen Wagner

Stephen Stürzenbaum

Stephen Riedel

Stephen Robinson

Andreas Stephen

 

Other publications of authors with the same name

Heterogeneous Concurrent Modeling and Design in Java (Volume 3: Ptolemy II Domains), , , , , and . UCB/EECS-2008-37. EECS Department, University of California, Berkeley, (April 2008)FPGA Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (2): 254-265 (2007)ScaleHLS: Scalable High-Level Synthesis through MLIR., , , , , , and . CoRR, (2021)SPADES: A Productive Design Flow for Versal Programmable Logic., , , and . FPL, page 65-71. IEEE, (2023)ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation., , , , , , and . HPCA, page 741-755. IEEE, (2022)Introduction to Special Issue on FPGAs in Data Centers., , , and . ACM Trans. Reconfigurable Technol. Syst., 15 (2): 11:1-11:2 (2022)FPGA HLS Today: Successes, Challenges, and Opportunities., , , , , , and . ACM Trans. Reconfigurable Technol. Syst., 15 (4): 51:1-51:42 (2022)IRFuzzer: Specialized Fuzzing for LLVM Backend Code Generation., , , , and . CoRR, (2024)CHARM: Composing Heterogeneous AcceleRators for Matrix Multiply on Versal ACAP Architecture., , , , , , , , , and 3 other author(s). FPGA, page 153-164. ACM, (2023)High level synthesis for FPGAs applied to a sphere decoder channel preprocessor (abstract only)., , , and . FPGA, page 278. ACM, (2011)