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Disambiguation of "Balasubramonian, Rajeev"

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Improving memristor memory with sneak current sharing.

, , , and . ICCD, page 549-556. IEEE Computer Society, (2015)

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Rajeev Sudra

Rajeev Gangula

Rajeev Ranjan

Rajeev Kavety

Rajeev Kumar

 

Other publications of authors with the same name

VAULT: Reducing Paging Overheads in SGX with Efficient Integrity Verification Structures., , and . ASPLOS, page 665-678. ACM, (2018)Memory bandwidth reservation in the cloud to avoid information leakage in the memory controller., , , , , , and . HASP@ISCA, page 11:1-11:5. ACM, (2014)OS execution on multi-cores: is out-sourcing worthwhile?, , and . ACM SIGOPS Oper. Syst. Rev., 43 (2): 104-105 (2009)Staged Reads: Mitigating the impact of DRAM writes on DRAM reads., , , , and . HPCA, page 41-52. IEEE Computer Society, (2012)Secure DIMM: Moving ORAM Primitives Closer to Memory., , , and . HPCA, page 428-440. IEEE Computer Society, (2018)INXS: Bridging the throughput and energy gap for spiking neural networks., , and . IJCNN, page 2451-2459. IEEE, (2017)Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0., , and . MICRO, page 3-14. IEEE Computer Society, (2007)Leveraging 3D Technology for Improved Reliability., and . MICRO, page 223-235. IEEE Computer Society, (2007)Improving Server Performance on Multi-cores via Selective Off-Loading of OS Functionality., , , and . ISCA Workshops, volume 6161 of Lecture Notes in Computer Science, page 275-292. Springer, (2010)SpinalFlow: An Architecture and Dataflow Tailored for Spiking Neural Networks., , , , and . ISCA, page 349-362. IEEE, (2020)