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Disambiguation of "Djordjevic, Goran Lj."

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Improving fault-tolerance capability of on-chip binary CDMA bus.

, , , and . J. Supercomput., 72 (1): 275-294 (2016)

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Sivahari Prasad Gorantla

Iwan Goranow

Djordje Djordjevic

Divna Djordjevic

Tatjana Ljubicic

 

Other publications of authors with the same name

CDMA bus-based on-chip interconnect infrastructure., , and . Microelectron. Reliab., 49 (4): 448-459 (2009)A Heuristic for Scheduling Task Graphs with Communication Delays Onto Multiprocessors., and . Parallel Comput., 22 (9): 1197-1214 (1996)Multi-algorithm UWB-based localization method for mixed LOS/NLOS environments., , , and . Comput. Commun., (2022)Loose composite constraint codes and their application in DVD., , and . IEEE J. Sel. Areas Commun., 19 (4): 765-773 (2001)Implementation of self-checking two-level combinational logic on FPGA and CPLD circuits., , and . Microelectron. Reliab., 44 (1): 173-178 (2004)Fuzzy ring-overlapping range-free (FRORF) localization method for wireless sensor networks., , , and . Comput. Commun., 35 (13): 1590-1600 (2012)A Compile-Time Scheduling Heuristic for Multiprocessor Architectures., and . Comput. J., 39 (8): 663-674 (1996)The asynchronous counterflow pipeline bit-serial multiplier., , , and . J. Syst. Archit., 44 (12): 985-1004 (1998)Improving fault-tolerance capability of on-chip binary CDMA bus., , , and . J. Supercomput., 72 (1): 275-294 (2016)Approach to partially self-checking combinational circuits design., , and . Microelectron. J., 35 (12): 945-952 (2004)