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The ExaNeSt Prototype: Evaluation of Efficient HPC Communication Hardware in an ARM-based Multi-FPGA Rack., , , , , , , , , and 14 other author(s). CoRR, (2023)Software Development Vehicles to Enable Extended and Early Co-design: A RISC-V and HPC Case of Study., , , , , , , , and . ISC Workshops, volume 13999 of Lecture Notes in Computer Science, page 526-537. Springer, (2023)Direct N-Body Application on Low-Power and Energy-Efficient Parallel Architectures., , , , , , , and . PARCO, volume 36 of Advances in Parallel Computing, page 583-592. IOS Press, (2019)eProcessor: European, Extendable, Energy-Efficient, Extreme-Scale, Extensible, Processor Ecosystem., , , , , , , , , and 24 other author(s). CF, page 309-314. ACM, (2023)Performance and energy footprint assessment of FPGAs and GPUs on HPC systems using Astrophysics application., , , , , , , , , and . CoRR, (2020)Short Reasons for Long Vectors in HPC CPUs: A Study Based on RISC-V., , , , , and . SC Workshops, page 1543-1549. ACM, (2023)