Author of the publication

Modeling and Synthesis of Asynchronous Pipelines.

, , and . IEEE Trans. Very Large Scale Integr. Syst., 19 (4): 682-695 (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A digital Class D amplifier design embodying a novel sampling process and pulse generator., , and . ISCAS (4), page 826-829. IEEE, (2001)A Randomized Modulation scheme for filterless digital Class D audio amplifiers., , , and . ISCAS, page 774-777. IEEE, (2014)A combined interpolatorless interpolation and high accuracy sampling process for digital class D amplifiers., , and . ISCAS (6), page 5405-5408. IEEE, (2005)Fast and memory-efficient invariant computation of ordinary Petri nets., , and . IET Comput. Digit. Tech., 1 (5): 612-624 (2007)Asynchronous Control Network Optimization Using Fast Minimum-Cycle-Time Analysis., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (6): 985-998 (2008)Design of several asynchronous-logic macrocells for a low-voltage micropower cell library., , and . IET Circuits Devices Syst., 1 (2): 161-169 (2007)Total Ionizing Dose (TID) effects on finger transistors in a 65nm CMOS process., , , , , , and . ISCAS, page 5-8. IEEE, (2016)A novel self-tuning pulse width modulator based on master-slave architecture for a Class D amplifier., , and . ISCAS (2), page 164-167. IEEE, (1999)Modeling external feedback path of an ITE digital hearing instrument for acoustic feedback cancellation., , and . ISCAS (2), page 1326-1329. IEEE, (2005)Fourier series analysis of the nonlinearities in analog closed-loop PWM class D amplifiers., , , and . ISCAS, IEEE, (2006)