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Data Transfer Optimizations for Host-CPU and Accelerators in AXI4MLIR., , , , и . CoRR, (2024)VCSR: An Efficient GPU Memory-Aware Sparse Format., , , и . IEEE Trans. Parallel Distributed Syst., 33 (10): 3977-3989 (2022)From High-Level Frameworks to custom Silicon with SODA., , , , , , , , , и 3 other автор(ы). HCS, стр. 1-13. IEEE, (2022)AXI4MLIR: User-Driven Automatic Host Code Generation for Custom AXI-Based Accelerators., , , , , , , , и . CGO, стр. 143-157. IEEE, (2024)ML-CGRA: An Integrated Compilation Framework to Enable Efficient Machine Learning Acceleration on CGRAs., , , , , , и . DAC, стр. 1-6. IEEE, (2023)AXI4MLIR: User-Driven Automatic Host Code Generation for Custom AXI-Based Accelerators., , , , , , , , и . CoRR, (2023)An MLIR-based Compiler Flow for System-Level Design and Hardware Acceleration., , , , , , , , и . ICCAD, стр. 6:1-6:9. ACM, (2022)Towards Automatic and Agile AI/ML Accelerator Design with End-to-End Synthesis., , , , , , , , , и 2 other автор(ы). ASAP, стр. 218-225. IEEE, (2021)Performance Evaluation and Improvement of Real-Time Computer Vision Applications for Edge Computing Devices., , и . ICPE (Companion), стр. 139-144. ACM, (2021)DRIPS: Dynamic Rebalancing of Pipelined Streaming Applications on CGRAs., , , , , , , и . HPCA, стр. 304-316. IEEE, (2022)