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Disambiguation of "Plosila, Juha"

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Parallel imperialist competitive algorithms.

, , , , , and . Concurr. Comput. Pract. Exp., (2018)

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Martin Juha

Juha Tiihonen

Attila Juhász

Ingolf Juhasz-Böss

Juha Reunanen

 

Other publications of authors with the same name

Efficient application mapping in resource limited homogeneous NoC-based manycore systems., , and . HPCS, page 207-212. IEEE, (2013)Dual Monitoring Communication for Self-Aware Network-on-Chip: Architecture and Case Study., , , and . Int. J. Adapt. Resilient Auton. Syst., 3 (3): 72-91 (2012)High-performance on-chip network platform for memory-on-processor architectures., , , , and . ReCoSoC, page 1-6. IEEE, (2011)HIBS - Novel inter-layer bus structure for stacked architectures., , and . 3DIC, page 1-7. IEEE, (2011)Design space exploration of thermal-aware many-core systems., , , , and . J. Syst. Archit., 59 (10-D): 1197-1213 (2013)Energy-Efficient Navigation of an Autonomous Swarm with Adaptive Consciousness., , , , and . Remote. Sens., 13 (6): 1059 (2021)SB-Router: A Swapped Buffer Activated Low Latency Network-on-Chip Router., , and . IEEE Access, (2021)Semi-Serial On-Chip Link Implementation for Energy Efficiency and High Throughput., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 20 (12): 2265-2277 (2012)Memory-Efficient On-Chip Network With Adaptive Interfaces., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (1): 146-159 (2012)Design and implementation of reconfigurable FIFOs for Voltage/Frequency Island-based Networks-on-Chip., , , and . Microprocess. Microsystems, 37 (4-5): 432-445 (2013)