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Disambiguation of "Ulrich, Ernst G."

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Concurrent Simulation at the Switch, Gate, and Register Levels.

. ITC, page 703-709. IEEE Computer Society, (1985)

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G Ernst

G Ulrich

Ulrich G Vollenweider

Ulrich G Schuster

Ulrich G Hofmann

 

Other publications of authors with the same name

Random test generation using concurrent logic simulation., , , and . DAC, page 261-267. ACM, (1975)Table lookup techniques for fast and flexible digital logic simulation.. DAC, page 560-563. ACM/IEEE, (1980)Experiences with concurrent fault simulation of diagnostic programs., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (6): 621-628 (1990)Exploitation of Periodicity in Logic Simulation of Synchronous Circuits., , and . ICCAD, page 62-65. IEEE Computer Society, (1990)Fault-test analysis techniques based on logic simulation., , and . DAC, page 111-115. ACM, (1972)High-speed concurrent fault simulation with vectors and scalars., , , , , , and . DAC, page 374-380. ACM/IEEE, (1980)Speed and accuracy in digital network simulation based on structural modeling., and . DAC, page 587-593. ACM/IEEE, (1982)Advances in Concurrent Multilevel Simulation., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (6): 1006-1012 (1987)Concurrent MIN-MAX simulation., , , and . EURO-DAC, page 554-557. EEE Computer Society, (1991)Programming languages for non-numeric processing - 2: Time sequenced logical simulation based on circuit delay and selective tracing of active network paths.. ACM National Conference, page 437-448. ACM, (1965)