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High-Level Synthesis of Non-Rectangular Multi-Dimensional Nested Loops Using Reshaping and Vectorization.

, , and . ICRC, page 1-10. IEEE, (2018)

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F5-HD: Fast Flexible FPGA-based Framework for Refreshing Hyperdimensional Computing., , , and . FPGA, page 53-62. ACM, (2019)FACH: FPGA-based acceleration of hyperdimensional computing by reducing computational complexity., , , , and . ASP-DAC, page 493-498. ACM, (2019)FPGA Acceleration of Sequence Alignment: A Survey., and . CoRR, (2020)NASCENT: Near-Storage Acceleration of Database Sort on SmartSSD., , , , , and . FPGA, page 262-272. ACM, (2021)SparseHD: Algorithm-Hardware Co-optimization for Efficient High-Dimensional Computing., , , , , and . FCCM, page 190-198. IEEE, (2019)HD2FPGA: Automated Framework for Accelerating Hyperdimensional Computing on FPGAs., , , , , and . ISQED, page 1-9. IEEE, (2023)Workload-Aware Opportunistic Energy Efficiency in Multi-FPGA Platforms., , , and . ICCAD, page 1-8. ACM, (2019)Residue-Net: Multiplication-free Neural Network by In-situ No-loss Migration to Residue Number Systems., , , and . ASP-DAC, page 222-228. ACM, (2021)FPGA Acceleration of Protein Back-Translation and Alignment., , , , , and . DATE, page 822-827. IEEE, (2021)Revisiting FPGA Routing under Varying Operating Conditions., , and . FPT, page 94-102. IEEE, (2020)