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A novel fine-grain track routing approach for routability and crosstalk optimization.

, , , , , and . ISQED, page 621-626. IEEE, (2011)

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Accurate prediction of detailed routing congestion using supervised data learning., , and . ICCD, page 97-103. IEEE Computer Society, (2014)High quality hypergraph partitioning for logic emulation., , , , and . Integr., (2022)Learning-based occupancy behavior detection for smart buildings., , , , , , and . ISCAS, page 954-957. IEEE, (2016)Fast two-dimensional finite element analysis for power network DC integrity checks of PCBs., , , , and . ASICON, page 76-79. IEEE, (2017)Design-Rule-Aware Congestion Model with Explicit Modeling of Vias and Local Pin Access Paths., , and . J. Comput. Sci. Technol., 30 (3): 614-628 (2015)A novel fine-grain track routing approach for routability and crosstalk optimization., , , , , and . ISQED, page 621-626. IEEE, (2011)Effective and Efficient Detailed Routing with Adaptive Rip-up Scheme and Pin Access Refinement., , , and . ACM Great Lakes Symposium on VLSI, page 165-168. ACM, (2022)Bridging the Gap between Global Routing and Detailed Routing: A Practical Congestion Model., , and . CAD/Graphics, page 74-80. IEEE, (2013)Physics-based full-chip TDDB assessment for BEOL interconnects., , , , and . DAC, page 45:1-45:6. ACM, (2016)VFGR: A very fast parallel global router with accurate congestion modeling., , , , and . ASP-DAC, page 525-530. IEEE, (2014)