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Disambiguation of "Mayaram, Kartikeya"

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Analysis of supply and ground noise sensitivity in ring and LC oscillators.

, , , and . ISCAS (6), page 5986-5989. IEEE, (2005)

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Accurate Prediction of Substrate Parasitics in Heavily Doped CMOS Processes Using a Calibrated Boundary Element Solver., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 13 (7): 843-851 (2005)HomSSPICE: a homotopy-based circuit simulator for periodic steady-state analysis of oscillators., , and . ISCAS (1), page 645-648. IEEE, (2002)Chameleon: a new multi-layer channel router., , , , , , and . DAC, page 495-502. IEEE Computer Society Press, (1986)An efficient modeling approach for substrate noise coupling analysis., , and . ISCAS (5), page 237-240. IEEE, (2002)An Ultralow-Power Receiver for Wireless Sensor Networks., , and . IEEE J. Solid State Circuits, 45 (9): 1759-1769 (2010)350 mV, 5 GHz Class-D Enhanced Swing Differential and Quadrature VCOs in 65 nm CMOS., , , , and . IEEE J. Solid State Circuits, 50 (8): 1833-1847 (2015)A 250 mV, 352 μ W GPS Receiver RF Front-End in 130 nm CMOS., , , and . IEEE J. Solid State Circuits, 46 (4): 938-949 (2011)Coupling algorithms for mixed-level circuit and device simulation., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 11 (8): 1003-1012 (1992)Techniques for multilayer channel routing., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 7 (6): 698-712 (1988)A comparison of substrate noise coupling in lightly and heavily doped CMOS processes for 2.4-GHz LNAs., , and . IEEE J. Solid State Circuits, 41 (3): 574-587 (2006)